Setting up U-Boot: Difference between revisions
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Bytes transferred = 107592 (1a448 hex) | Bytes transferred = 107592 (1a448 hex) | ||
For the V3 MMU U-Boot is loaded | For the V3 MMU U-Boot is loaded from host pdelaney_fc9 into memory with virtual == physical. Here is a DC233L, with V3 MMU, example: | ||
U-Boot> tftpboot | U-Boot> tftpboot | ||
Using open_ethernet device | Using open_ethernet device | ||
TFTP from server 192.168.11. | TFTP from server 192.168.11.55; our IP address is 192.168.11.95 | ||
Filename 'u-boot.bin'. | Filename 'u-boot.bin'. | ||
Load address: 0x2000000 | Load address: 0x2000000 | ||
Loading: T | Loading: T ######## | ||
done | done | ||
Bytes transferred = | Bytes transferred = 109964 (1ad8c hex) | ||
U-Boot> | U-Boot> | ||
Now things get a bit tricky here for the LX60. The FLASG has '''Two sizes of Flash Sectors'''. | |||
The first 8 sectors are small 0x2000 (8KB) and apparently intended for parameters. The rest | |||
of the 4MB flash is composed of larger 0x10000 (64KB) sectors. Our code doesn't differentiate | |||
between the sectors and the LX60 hardware is going to map 0XF800,0000 to 0XFE00,0000 so this | |||
makes us use of all 8 of the 8KB sectors and the 1st 64KB sector at F8010000. So we are going | |||
to flash up to F801FFFF below. | |||
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Now copy the the image of u-boot.bin in memory to the flash. For the XL60 with the | Now copy the the image of u-boot.bin in memory to the flash. For the XL60 with the '''OLD''' V2 MMU you copy 0x20000 | ||
bytes from 0xd2000000 to 0XF8000000: | bytes from 0xd2000000 to 0XF8000000: | ||
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For the LX60 with the V3 MMU you copy 0x24000 bytes from 0x2000000 to F8000000: | For the LX60 with the '''NEW''' V3 MMU you copy 0x24000 bytes from 0x2000000 to F8000000: | ||
U-Boot> '''cp.b 2000000 F8000000 | U-Boot> '''cp.b 2000000 F8000000 20000''' | ||
Copy to Flash... done | Copy to Flash... done | ||
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Copy to Flash... done | Copy to Flash... done | ||
Finally we protect these | Finally we protect these sectors so that U-Boot isn't easily erased by accident. | ||
Below is what it looks like on a LX60 with the New V3 MMU with a subsequent display of the flash info: | Below is what it looks like on a LX60 with the New V3 MMU with a subsequent display of the flash info: | ||
U-Boot> cp.b 2000000 F8000000 | U-Boot> cp.b 2000000 F8000000 2000 | ||
Copy to Flash... done | Copy to Flash... done | ||
U-Boot> flinfo | U-Boot> flinfo | ||
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Sector Start Addresses: | Sector Start Addresses: | ||
F8000000 F8002000 F8004000 F8006000 F8008000 | F8000000 F8002000 F8004000 F8006000 F8008000 | ||
F800A000 F800C000 F800E000 F8010000 F8020000 | F800A000 F800C000 F800E000 F8010000 F8020000 E | ||
F8030000 E F8040000 E F8050000 E F8060000 E F8070000 E | F8030000 E F8040000 E F8050000 E F8060000 E F8070000 E | ||
F8080000 E F8090000 E F80A0000 E F80B0000 E F80C0000 E | F8080000 E F8090000 E F80A0000 E F80B0000 E F80C0000 E | ||
| Line 274: | Line 278: | ||
Sector Start Addresses: | Sector Start Addresses: | ||
F8000000 RO F8002000 RO F8004000 RO F8006000 RO F8008000 RO | F8000000 RO F8002000 RO F8004000 RO F8006000 RO F8008000 RO | ||
F800A000 RO F800C000 RO F800E000 RO F8010000 RO F8020000 | F800A000 RO F800C000 RO F800E000 RO F8010000 RO F8020000 E | ||
F8030000 E F8040000 E F8050000 E F8060000 E F8070000 E | F8030000 E F8040000 E F8050000 E F8060000 E F8070000 E | ||
F8080000 E F8090000 E F80A0000 E F80B0000 E F80C0000 E | F8080000 E F8090000 E F80A0000 E F80B0000 E F80C0000 E | ||
Revision as of 02:53, 11 September 2010
LX60 and LX200 U-Boot Installation
(Note: The DC233 isn't currently working and is being actively investigated. We hope to have it working shortly.
U-Boot is a very popular boot loader; especially within the Embedded Linux community. A preliminary port to the Xtensa architecture is now available at linux-xtensa.org. See U-Boot Sources (GIT Summary). Or, to access this tree using git directly, use something like:
$ git clone git://git.linux-xtensa.org/git/u-boot/u-boot-xtensa.git u-boot $ cd u-boot
(Note: This path is subject to change.)
The U-Boot git repository has a branch with a HiFi 2 snapshot made for
the LX200 SMP HiFi 2 Development Board. With this branch you can simply check
out the snapshot_2+SMP branch which includes the binaries which are discussed below:
$ git clone git://git.linux-xtensa.org/git/u-boot/u-boot-xtensa.git u-boot $ cd u-boot $ git branch --track snapshot_2+SMP origin/snapshot_2+SMP $ git checkout snapshot_2+SMP
$ ls -l u-boot u-boot.bin tools/mkimage
-rwxr-xr-x 1 piet tensilica 45016 2009-12-07 19:40 tools/mkimage [This is a small program you need to put in your search path to build kernel U-Boot images]
-rwxr-xr-x 1 piet tensilica 635339 2009-12-07 19:40 u-boot [Started with xt-gdb to bring up the 1st instance of a HiFi 2 U-Boot]
-rwxr-xr-x 1 piet tensilica 144944 2009-12-07 19:40 u-boot.bin [Loaded by the 1st instance of U-Boot, it's a HiFi2 version of u-boot that will be put in flash]
$
Unless you are using a U-Boot snapshot you need to build U-Boot for which you must have built the Buildroot toolchain for XTensa core. Set your PATH to point to the toolchain built using buildroot. For example:
$ export PATH="<workdir>/buildroot/build_xtensa_<cname>/staging_dir/usr/bin:$PATH"
where <cname> is the name of the Xtensa core variant you wish to build for (e.g., dc232b dc233c).
To build U-Boot, use the cloned git tree pulled above, you should be at the top level of the tree in the u-boot directory , then configure it for your board and Xtensa core variant as follows:
make distclean make <cname>_<board>_config
'dc232b'dc This should only take a few seconds. For example, to build U-boot for the 'xtav60' board and the older 'dc232b' core with the V2 MMU type:
$ cd u-boot $ make dc232b_xtav60_config [NOTE: You can skip this step with the the HiFi-2 snapshot_2+SMP branch; binaries are pre-built]
or for the new 'dc233c' core with the new V3 MMU type:
$ make dc233c_xtav60_config [NOTE: You can skip this step with the the HiFi-2 snapshot_2+SMP branch; binaries are pre-built]
or for a 'xtav200' board type with the new 'dc233c' core type:
$ make dc233c_xtav200_config [NOTE: You can skip this step with the the HiFi-2 snapshot_2+SMP branch; binaries are pre-built]
or for the snapshot_2+SMP branch you can also build U-Boot for the HiFi 2 core:
$ make test_mmuhifi_c3_xtav200_config [NOTE: You can skip this step with the the HiFi-2 snapshot_2+SMP branch; binaries are pre-built]
Only boards and core variants currently supported in the tree can be built out of the box. Headers for supported cores can be found in the tree under include/asm-xtensa/variant-<cname>. The core specific headers are described in the doc/README.xtensa file. To support a new core, these headers must be copied from the overlay in the same way as for the linux kernel.
After the configuration step, to actually build U-Boot, simply:
$ make all [NOTE: You can skip this step with the the HiFi-2 snapshot_2+SMP branch; binaries are pre-built]
This will take a quite a few minutes.
Next, start xt-gdb and load u-boot from the top of the git repository:
$ xt-gdb -n [NOTE: Even with the HiFi 2 snapshot_2+SMP branch you still may have to put U-Boot on the board] (xt-gdb) file u-boot (xt-gdb) target remote localhost:20000 0 (xt-gdb) reset (xt-gdb) load (xt-gdb) break panic (xt-gdb) continue
Hopefully U-Boot will start, and display on the LCD in the case of a LX60.
U-Boot 50.00 Mhz
Often you will be starting with the boards flash in an unknown state and it's best to unprotect and erase the entire flash. Just type protect off all followed by erase all:
U-Boot> protect off all Un-Protect Flash Bank # 1 ................................................................................................................................... done U-Boot> erase all Erase Flash Bank # 1 .......................................................................................................... Flash erase timeout at address f8d40000 da0 Flash erase error at address f8d40000 ........................ done U-Boot>
The timeout and error messages are likley just warning messages and you board has been errased. You can see that with the flash info command flinfo. Below is an example with a LX200 board, which has a much larger flash than the smaller LX60:
U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 64 bytes
Sector Start Addresses:
F8000000 E F8020000 E F8040000 E F8060000 E F8080000 E
F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E
F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E
F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E
F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E
F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E
F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E
F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E
F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E
F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E
F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E
F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E
F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E
F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E
F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E
F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E
F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E
F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E
F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E
F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E
F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E
F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E
F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E
F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E
F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E
F8FA0000 E F8FC0000 E F8FE0000 E F8FE8000 E F8FF0000 E
F8FF8000 E
U-Boot>
Now set your preliminary U-Boot environment variables to point to your TFTP server so we can download yet another copy of U-Boot. At Tensilica we use a machine in the RTOS group called rtos-lab2. Folks using the SMP HiFi 2 Development Board likely have set up their workstation with a TFTP server.
U-Boot> setenv serverip 192.168.11.78 rtos-lab2
or
U-Boot> setenv serverip 192.168.11.55 pdelaney_fc9
U-Boot> setenv ipaddr 192.168.11.95 I/P address of RTOS5, Piet's LX60; MAC: 00:05:C2:13:6f:0a
U-Boot> setenv bootfile u-boot.bin U-Boot> saveenv Saving Environment to Flash... .... done Un-Protected 4 sectors Erasing Flash... .... done Erased 4 sectors Writing to Flash... done .... done Protected 4 sectors U-Boot>
Next, download u-boot.bin from the tftp server using the info we just entered into U-Boot's enviroment variables.
Here for example is the case for a LX60 running the HiFi-2 Bitstream with the older V2 MMU. Note that it starts up
in the D-gazillion (0XD0000000) region:
U-Boot> tftpboot TFTP from server 192.168.11.78; our IP address is 192.168.11.95 Filename 'u-boot.bin'. Load address: 0xd2000000 Loading: T ######## done Bytes transferred = 107592 (1a448 hex)
For the V3 MMU U-Boot is loaded from host pdelaney_fc9 into memory with virtual == physical. Here is a DC233L, with V3 MMU, example:
U-Boot> tftpboot Using open_ethernet device TFTP from server 192.168.11.55; our IP address is 192.168.11.95 Filename 'u-boot.bin'. Load address: 0x2000000 Loading: T ######## done Bytes transferred = 109964 (1ad8c hex) U-Boot>
Now things get a bit tricky here for the LX60. The FLASG has Two sizes of Flash Sectors. The first 8 sectors are small 0x2000 (8KB) and apparently intended for parameters. The rest of the 4MB flash is composed of larger 0x10000 (64KB) sectors. Our code doesn't differentiate between the sectors and the LX60 hardware is going to map 0XF800,0000 to 0XFE00,0000 so this makes us use of all 8 of the 8KB sectors and the 1st 64KB sector at F8010000. So we are going to flash up to F801FFFF below.
On a LX200 we have much more space and can easily fit a version of U-boot that has been compiled without optimization, make debugging much easier.
So in this case the image is a bit larger, but relatively similar to the LX60 (2 sectors):
U-Boot> tftpboot Using open_ethernet device TFTP from server 192.168.11.78; our IP address is 192.168.11.95 Filename 'u-boot.bin'. Load address: 0xd2000000 Loading: ############### done Bytes transferred = 205852 (3241c hex) U-Boot>
Note that for both the LX200 and the LX60 that the image size, (3241c hex) in this case, is a bit less than 0x40000 or 10 sectors,
so turn off protection on the 1st 11 sectors and
erase the current contents.
For the LX60 you do this:
U-Boot> protect off F8000000 F801FFFF
... done
Un-Protected 2 sectors
U-Boot> erase F8000000 F801FFFF
erase F8000000 F801FFFF
... done
For the LX200 the starting address (F8000000) is the same as with the LX60 but the last addesss (F803FFFF) is 'twice' as high:
U-Boot> protect off F8000000 F803FFFF ... done Un-Protected 2 sectors U-Boot> erase F8000000 F803FFFF Erased 2 sectors U-Boot>
Now copy the the image of u-boot.bin in memory to the flash. For the XL60 with the OLD V2 MMU you copy 0x20000
bytes from 0xd2000000 to 0XF8000000:
U-Boot> cp.b d2000000 F8000000 20000 Copy to Flash... done
For the LX60 with the NEW V3 MMU you copy 0x24000 bytes from 0x2000000 to F8000000:
U-Boot> cp.b 2000000 F8000000 20000 Copy to Flash... done
For the LX200 you copy 0x40000 bytes from 0xd2000000 to 0XF8000000...0XF803FFFF:
U-Boot> cp.b d2000000 F8000000 40000 Copy to Flash... done
Finally we protect these sectors so that U-Boot isn't easily erased by accident. Below is what it looks like on a LX60 with the New V3 MMU with a subsequent display of the flash info:
U-Boot> cp.b 2000000 F8000000 2000
Copy to Flash... done
U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 4 MB in 71 Sectors
AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x2257
Erase timeout: 8192 ms, write timeout: 1 ms
Sector Start Addresses:
F8000000 F8002000 F8004000 F8006000 F8008000
F800A000 F800C000 F800E000 F8010000 F8020000 E
F8030000 E F8040000 E F8050000 E F8060000 E F8070000 E
F8080000 E F8090000 E F80A0000 E F80B0000 E F80C0000 E
F80D0000 E F80E0000 E F80F0000 E F8100000 E F8110000 E
F8120000 E F8130000 E F8140000 E F8150000 E F8160000 E
F8170000 E F8180000 E F8190000 E F81A0000 E F81B0000 E
F81C0000 E F81D0000 E F81E0000 E F81F0000 E F8200000 E
F8210000 E F8220000 E F8230000 E F8240000 E F8250000 E
F8260000 E F8270000 E F8280000 E F8290000 E F82A0000 E
F82B0000 E F82C0000 E F82D0000 E F82E0000 E F82F0000 E
F8300000 E F8310000 E F8320000 E F8330000 E F8340000 E
F8350000 E F8360000 E F8370000 E F8380000 E F8390000 E
F83A0000 E F83B0000 E F83C0000 E F83D0000 E F83E0000
F83F0000 RO
U-Boot> protect on F8000000 F802FFFF
.......... done
Protected 10 sectors
U-Boot>
U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 4 MB in 71 Sectors
AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x2257
Erase timeout: 8192 ms, write timeout: 1 ms
Sector Start Addresses:
F8000000 RO F8002000 RO F8004000 RO F8006000 RO F8008000 RO
F800A000 RO F800C000 RO F800E000 RO F8010000 RO F8020000 E
F8030000 E F8040000 E F8050000 E F8060000 E F8070000 E
F8080000 E F8090000 E F80A0000 E F80B0000 E F80C0000 E
F80D0000 E F80E0000 E F80F0000 E F8100000 E F8110000 E
F8120000 E F8130000 E F8140000 E F8150000 E F8160000 E
F8170000 E F8180000 E F8190000 E F81A0000 E F81B0000 E
F81C0000 E F81D0000 E F81E0000 E F81F0000 E F8200000 E
F8210000 E F8220000 E F8230000 E F8240000 E F8250000 E
F8260000 E F8270000 E F8280000 E F8290000 E F82A0000 E
F82B0000 E F82C0000 E F82D0000 E F82E0000 E F82F0000 E
F8300000 E F8310000 E F8320000 E F8330000 E F8340000 E
F8350000 E F8360000 E F8370000 E F8380000 E F8390000 E
F83A0000 E F83B0000 E F83C0000 E F83D0000 E F83E0000
F83F0000 RO
U-Boot>
Below is what it looks like on a LX200 with the V2 MMU with a subsequent display of the flash info. Notice that the Flash Sectors are 10X as large on the LX200:
U-Boot> protect on F8000000 F802FFFF .. done Protected 2 sectors U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 64 bytes
Sector Start Addresses:
F8000000 RO F8020000 RO F8040000 E F8060000 E F8080000 E
F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E
F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E
F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E
F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E
F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E
F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E
F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E
F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E
F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E
F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E
F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E
F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E
F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E
F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E
F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E
F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E
F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E
F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E
F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E
F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E
F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E
F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E
F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E
F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E
F8FA0000 E F8FC0000 E F8FE0000 RO F8FE8000 RO F8FF0000 RO
F8FF8000 RO
U-Boot>
Note that the U-Boot saveenv command Erased and protected the last four sectors of this LX200.
On both the LX60 and the LX200 now move DIP switch 8 to the ON position, power cycle the board. On the LX60 you should see U-boot in the LCD display.
The LX60 with the V3 MMU currently fails and is being investigated.
On the LX60 with the V2 MMU the serial console should print something like the following:
U-Boot 1.3.2 (Aug 27 2009 - 18:23:04) CPU: Xtensa dc232b at 50.00 MHz Board: XT-AV60: Avnet board + Xilinx LX60 FPGA + Tensilica bitstream SysRAM: 64 MB Flash: 4 MB In: serial Out: serial Err: serial MAC: U-Boot>
On the LX200 you should see something like the following. In this case we also show the flash info command, flinfo, being envoked just after booting U-Boot:
CPU: Xtensa test_mmuhifi_c3 at 41.6777 MHz Board: XT-AV200: Avnet board + Xilinx LX200 FPGA + Tensilica bitstream SysRAM: 96 MB Flash: 16 MB In: serial Out: serial Err: serial MAC: IP: 192.168.11.95 U-Boot>
U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 64 bytes
Sector Start Addresses:
F8000000 RO F8020000 RO F8040000 E RO F8060000 E RO F8080000 E RO
F80A0000 E RO F80C0000 E RO F80E0000 E RO F8100000 E RO F8120000 E RO
F8140000 E RO F8160000 E RO F8180000 E RO F81A0000 E RO F81C0000 E RO
F81E0000 E RO F8200000 E RO F8220000 E RO F8240000 E RO F8260000 E RO
F8280000 E RO F82A0000 E RO F82C0000 E RO F82E0000 E RO F8300000 E RO
F8320000 E RO F8340000 E RO F8360000 E RO F8380000 E RO F83A0000 E RO
F83C0000 E RO F83E0000 E RO F8400000 E RO F8420000 E RO F8440000 E RO
F8460000 E RO F8480000 E RO F84A0000 E RO F84C0000 E RO F84E0000 E RO
F8500000 E RO F8520000 E RO F8540000 E RO F8560000 E RO F8580000 E RO
F85A0000 E RO F85C0000 E RO F85E0000 E RO F8600000 E RO F8620000 E RO
F8640000 E RO F8660000 E RO F8680000 E RO F86A0000 E RO F86C0000 E RO
F86E0000 E RO F8700000 E RO F8720000 E RO F8740000 E RO F8760000 E RO
F8780000 E RO F87A0000 E RO F87C0000 E RO F87E0000 E RO F8800000 E RO
F8820000 E RO F8840000 E RO F8860000 E RO F8880000 E RO F88A0000 E RO
F88C0000 E RO F88E0000 E RO F8900000 E RO F8920000 E RO F8940000 E RO
F8960000 E RO F8980000 E RO F89A0000 E RO F89C0000 E RO F89E0000 E RO
F8A00000 E RO F8A20000 E RO F8A40000 E RO F8A60000 E RO F8A80000 E RO
F8AA0000 E RO F8AC0000 E RO F8AE0000 E RO F8B00000 E RO F8B20000 E RO
F8B40000 E RO F8B60000 E RO F8B80000 E RO F8BA0000 E RO F8BC0000 E RO
F8BE0000 E RO F8C00000 E RO F8C20000 E RO F8C40000 E RO F8C60000 E RO
F8C80000 E RO F8CA0000 E RO F8CC0000 E RO F8CE0000 E RO F8D00000 E RO
F8D20000 E RO F8D40000 E RO F8D60000 E RO F8D80000 E RO F8DA0000 E RO
F8DC0000 E RO F8DE0000 E RO F8E00000 E RO F8E20000 E RO F8E40000 E RO
F8E60000 E RO F8E80000 E RO F8EA0000 E RO F8EC0000 E RO F8EE0000 E RO
F8F00000 E RO F8F20000 E RO F8F40000 E RO F8F60000 E RO F8F80000 E RO
F8FA0000 E RO F8FC0000 E RO F8FE0000 RO F8FE8000 RO F8FF0000 RO
F8FF8000 RO
U-Boot>
Note that the 1st two sectors with U-Boot saved in them came up as not being erased (E) but that all sectors came up Read Only (RO).
Same with the last four sectors that the U-Boot saveenv command Erased. This is likely a bug that we have been investigating and will be discussing with the U-Boot developers sometime in the future prior to pushing our U-boot changes upstream.
Further details on U-Boot in general are in the generic README at the top of the U-Boot tree. Details specific to the Xtensa architecture are in doc/README.xtensa. Details specific to a board are in board[/<family>]/<board>/README (for example board/avnet/xtav60/README).