Setting up U-Boot: Difference between revisions
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[http://www.denx.de/wiki/UBoot U-Boot] is another popular boot loader. A preliminary port to the Xtensa architecture is now available. See [http://git.linux-xtensa.org/cgi-bin/git.cgi?p=u-boot/u-boot-xtensa.git;a=summary U-Boot Sources (GIT Summary)]. Or, to access this tree using <tt>git</tt> directly, use something like: | [http://www.denx.de/wiki/UBoot U-Boot] is another popular boot loader. A preliminary port to the Xtensa architecture is now available. See [http://git.linux-xtensa.org/cgi-bin/git.cgi?p=u-boot/u-boot-xtensa.git;a=summary U-Boot Sources (GIT Summary)]. Or, to access this tree using <tt>git</tt> directly, use something like: | ||
git clone git://git.linux-xtensa.org/git/u-boot/u-boot-xtensa.git u-boot | $ '''git clone git://git.linux-xtensa.org/git/u-boot/u-boot-xtensa.git u-boot''' | ||
''('''Note:''' This path is subject to change.)'' | ''('''Note:''' This path is subject to change.)'' | ||
Before you can build U-Boot you must have built the toolchain for XTensa core. | Before you can build U-Boot you must have built the toolchain for XTensa core. | ||
Set your PATH to point to the toolchain built using buildroot. | Set your PATH to point to the toolchain built using buildroot. For example: | ||
$ '''export PATH="''<workdir>''/buildroot/build_xtensa_''<cname>''/staging_dir/usr/bin:$PATH"''' | |||
where ''<cname>'' is the name of the Xtensa core variant you wish to build for (e.g., <tt>dc232b</tt>). | where ''<cname>'' is the name of the Xtensa core variant you wish to build for (e.g., <tt>dc232b</tt>). | ||
To build U-Boot, | To build U-Boot, use the cloned git tree pulled above, change to the top level of the tree, '''u-boot', then configure it for your board and Xtensa core variant as follows: | ||
make <cname>_<board> | cd u-boot | ||
make <cname>'''_<board>_'''config | |||
This should only take a few seconds. For example, to build U-boot for the 'xtav60' board and 'dc232b' core: | This should only take a few seconds. For example, to build U-boot for the 'xtav60' board and 'dc232b' core, type: | ||
make dc232b_xtav60_config | $ '''cd u-boot''' | ||
$ '''make dc232b_xtav60_config''' | |||
or for a 'xtav200' board type | |||
$ '''make dc232b_xtav200_config''' | |||
Only boards and core variants currently supported in the tree can be built out of the box. Headers for supported cores can be found in the tree under <tt>include/asm-xtensa/variant-<cname></tt>. The core specific headers are described in the <tt>doc/README.xtensa</tt> file. To support a new core, these headers must be copied from the overlay in the same way as for the linux kernel. | Only boards and core variants currently supported in the tree can be built out of the box. Headers for supported cores can be found in the tree under <tt>include/asm-xtensa/variant-<cname></tt>. The core specific headers are described in the <tt>doc/README.xtensa</tt> file. To support a new core, these headers must be copied from the overlay in the same way as for the linux kernel. | ||
Line 26: | Line 32: | ||
After the configuration step, to actually build U-Boot, simply: | After the configuration step, to actually build U-Boot, simply: | ||
make all | $ '''make all''' | ||
This will take a few minutes. | This will take a quite a few minutes. | ||
Next, start xt-gdb and load u-boot from the top of the git repository: | Next, start xt-gdb and load u-boot from the top of the git repository: | ||
cd u-boot-xtensa | $ '''cd u-boot-xtensa''' | ||
xt-gdb -n | $ '''xt-gdb -n''' | ||
file u-boot | $ '''file u-boot''' | ||
target remote localhost:20000 0 | $ '''target remote localhost:20000 0''' | ||
reset | $ '''reset''' | ||
load | $ '''load''' | ||
break panic | $ '''break panic''' | ||
continue | $ '''continue''' | ||
Hopefully u-boot will start and display on the LCD | Hopefully u-boot will start and display on the LCD | ||
Line 45: | Line 51: | ||
U-Boot 50.00 Mhz | U-Boot 50.00 Mhz | ||
Often you will be starting with a flash in an unknown state and it's best to unprotect and erase the entire flash. Just type '''protect off all''' followed by '''erase all''': | |||
U-Boot> '''protect off all''' | |||
Un-Protect Flash Bank # 1 | |||
................................................................................................................................... done | |||
U-Boot> '''erase all''' | |||
Erase Flash Bank # 1 | |||
.......................................................................................................... | |||
Flash erase timeout at address f8d40000 da0 | |||
Flash erase error at address f8d40000 | |||
........................ done | |||
U-Boot> | |||
The timeout and error messages are likley just warning messages and you board has been errased. You can see that with the flash info command '''flinfo'''. Below is an example with a LX200 board, which has a much larger flash than the smaller LX60: | |||
U-Boot> '''flinfo''' | |||
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors | |||
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 | |||
Erase timeout: 4096 ms, write timeout: 1 ms | |||
Buffer write timeout: 2 ms, buffer size: 64 bytes | |||
Sector Start Addresses: | |||
F8000000 E F8020000 E F8040000 E F8060000 E F8080000 E | |||
F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E | |||
F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E | |||
F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E | |||
F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E | |||
F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E | |||
F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E | |||
F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E | |||
F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E | |||
F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E | |||
F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E | |||
F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E | |||
F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E | |||
F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E | |||
F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E | |||
F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E | |||
F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E | |||
F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E | |||
F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E | |||
F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E | |||
F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E | |||
F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E | |||
F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E | |||
F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E | |||
F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E | |||
F8FA0000 E F8FC0000 E F8FE0000 E F8FE8000 E F8FF0000 E | |||
F8FF8000 E | |||
U-Boot> | |||
Now set your U-Boot environment variables to point to your DHCP and TFTP server. At Tensilica we use a machine in the RTOS group called rtos-lab2: | |||
U-Boot> '''setenv serverip 192.168.11.78''' rtos-lab2 | |||
U-Boot> '''setenv ipaddr 192.168.11.95''' I/P address of host running on the LX60/LX200 | |||
U-Boot> '''setenv bootfile u-boot.bin''' | |||
U-Boot> '''saveenv''' | |||
Saving Environment to Flash... | |||
.... done | |||
Un-Protected 4 sectors | |||
Erasing Flash... | |||
.... done | |||
Erased 4 sectors | |||
Writing to Flash... done | |||
.... done | |||
Protected 4 sectors | |||
U-Boot> | |||
Next, download 'u-boot.bin' from the tftp server: | Next, download 'u-boot.bin' from the tftp server: | ||
tftpboot | '''tftpboot''' | ||
TFTP from server 192.168.11.78; our IP address is 192.168.11.95 | TFTP from server 192.168.11.78; our IP address is 192.168.11.95 | ||
Filename 'u-boot.bin'. | Filename 'u-boot.bin'. | ||
Line 62: | Line 131: | ||
Bytes transferred = 107592 (1a448 hex) | Bytes transferred = 107592 (1a448 hex) | ||
Note that the image is a bit less than 2 sectors, | on a LX200 we have much more space and can easily fit a version of U-boot that has been compiled without optimization to make debugging much easier, | ||
So in this case the image is a bit larger: | |||
U-Boot> '''tftpboot''' | |||
Using open_ethernet device | |||
TFTP from server 192.168.11.78; our IP address is 192.168.11.95 | |||
Filename 'u-boot.bin'. | |||
Load address: 0xd2000000 | |||
Loading: ############### | |||
done | |||
Bytes transferred = 205852 (3241c hex) | |||
U-Boot> | |||
Note that for both the LX200 and the LX60 that the image is a bit less than 2 sectors, | |||
so turn off protection on the 1st two sectors and | so turn off protection on the 1st two sectors and | ||
erase the current contents: | erase the current contents. For the LX60 you do this: | ||
protect off F8000000 F801FFFF | U-Boot> '''protect off F8000000 F801FFFF''' | ||
... done | |||
Un-Protected 2 sectors | |||
erase F8000000 F801FFFF | U-Boot> '''erase F8000000 F801FFFF''' | ||
erase F8000000 F801FFFF | erase F8000000 F801FFFF | ||
... done | ... done | ||
Now copy the the image of u-boot.bin in memory to the flash: | For the LX200 the starting address is the same as with the LX60 but the last addesss is twice as high: | ||
U-Boot> '''protect off F8000000 F803FFFF''' | |||
... done | |||
Un-Protected 2 sectors | |||
U-Boot> '''erase F8000000 F803FFFF''' | |||
Erased 2 sectors | |||
U-Boot> | |||
Finally we protect these first two sectors so that U-Boot isn't easily errased by accident. | |||
Below is what it looks like on a LX200 with a subsequent display of the flash info: | |||
U-Boot> '''protect on F8000000 F803FFFF''' | |||
.. done | |||
Protected 2 sectors | |||
U-Boot> '''flinfo''' | |||
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors | |||
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 | |||
Erase timeout: 4096 ms, write timeout: 1 ms | |||
Buffer write timeout: 2 ms, buffer size: 64 bytes | |||
Sector Start Addresses: | |||
F8000000 RO F8020000 RO F8040000 E F8060000 E F8080000 E | |||
F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E | |||
F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E | |||
F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E | |||
F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E | |||
F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E | |||
F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E | |||
F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E | |||
F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E | |||
F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E | |||
F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E | |||
F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E | |||
F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E | |||
F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E | |||
F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E | |||
F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E | |||
F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E | |||
F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E | |||
F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E | |||
F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E | |||
F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E | |||
F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E | |||
F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E | |||
F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E | |||
F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E | |||
F8FA0000 E F8FC0000 E F8FE0000 RO F8FE8000 RO F8FF0000 RO | |||
F8FF8000 RO | |||
U-Boot> | |||
Note that the U-Boot '''saveenv''' command Erassed and protected the last to sectors | |||
of this LX200. | |||
Now copy the the image of u-boot.bin in memory to the flash. For the XL60 you copy 0x20000 | |||
bytes from 0xd2000000 to 0XF8000000: | |||
cp.b d2000000 F8000000 20000 | '''cp.b d2000000 F8000000 20000''' | ||
Copy to Flash... done | Copy to Flash... done | ||
On the LX60 now move DIP switch 8 to the ON position, power cycle the LX60, and you should see U-boot in the LCD display and the serial console should print something like the following: | For the LX200 you copy 0x40000 bytes from 0xd2000000 to 0XF8000000: | ||
'''cp.b d2000000 F8000000 40000''' | |||
Copy to Flash... done | |||
Now U-boot has been saved at the beginning of the flash and can be easy seen with the flash info command. | |||
On the LX200 it should look like this: | |||
U-Boot> '''flinfo''' | |||
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors | |||
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 | |||
Erase timeout: 4096 ms, write timeout: 1 ms | |||
Buffer write timeout: 2 ms, buffer size: 64 bytes | |||
Sector Start Addresses: | |||
F8000000 F8020000 F8040000 E F8060000 E F8080000 E | |||
F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E | |||
F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E | |||
F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E | |||
F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E | |||
F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E | |||
F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E | |||
F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E | |||
F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E | |||
F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E | |||
F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E | |||
F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E | |||
F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E | |||
F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E | |||
F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E | |||
F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E | |||
F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E | |||
F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E | |||
F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E | |||
F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E | |||
F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E | |||
F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E | |||
F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E | |||
F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E | |||
F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E | |||
F8FA0000 E F8FC0000 E F8FE0000 E F8FE8000 E F8FF0000 RO | |||
F8FF8000 RO | |||
U-Boot> | |||
On both the LX60 and the LX200 now move DIP switch 8 to the ON position, power cycle the LX60, and you should see U-boot in the LCD display and the serial console should print something like the following on the LX60: | |||
U-Boot 1.3.2 (Aug 27 2009 - 18:23:04) | U-Boot 1.3.2 (Aug 27 2009 - 18:23:04) | ||
Line 93: | Line 278: | ||
MAC: | MAC: | ||
U-Boot> | U-Boot> | ||
For the LX200 you should see something like the following. | |||
U-Boot 2009.08-00060-g3aa8b68-dirty (Sep 10 2009 - 01:19:31) | |||
CPU: Xtensa test_mmuhifi_c3 at 41.6777 MHz | |||
Board: XT-AV200: Avnet board + Xilinx LX200 FPGA + Tensilica bitstream | |||
SysRAM: 96 MB | |||
*** Warning - bad CRC, using default environment | |||
Flash: 16 MB | |||
In: serial | |||
Out: serial | |||
Err: serial | |||
MAC: | |||
U-Boot> | |||
Timed out waiting for command | |||
U-Boot> '''flinfo''' | |||
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors | |||
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 | |||
Erase timeout: 4096 ms, write timeout: 1 ms | |||
Buffer write timeout: 2 ms, buffer size: 64 bytes | |||
Sector Start Addresses: | |||
F8000000 RO F8020000 RO F8040000 E RO F8060000 E RO F8080000 E RO | |||
F80A0000 E RO F80C0000 E RO F80E0000 E RO F8100000 E RO F8120000 E RO | |||
F8140000 E RO F8160000 E RO F8180000 E RO F81A0000 E RO F81C0000 E RO | |||
F81E0000 E RO F8200000 E RO F8220000 E RO F8240000 E RO F8260000 E RO | |||
F8280000 E RO F82A0000 E RO F82C0000 E RO F82E0000 E RO F8300000 E RO | |||
F8320000 E RO F8340000 E RO F8360000 E RO F8380000 E RO F83A0000 E RO | |||
F83C0000 E RO F83E0000 E RO F8400000 E RO F8420000 E RO F8440000 E RO | |||
F8460000 E RO F8480000 E RO F84A0000 E RO F84C0000 E RO F84E0000 E RO | |||
F8500000 E RO F8520000 E RO F8540000 E RO F8560000 E RO F8580000 E RO | |||
F85A0000 E RO F85C0000 E RO F85E0000 E RO F8600000 E RO F8620000 E RO | |||
F8640000 E RO F8660000 E RO F8680000 E RO F86A0000 E RO F86C0000 E RO | |||
F86E0000 E RO F8700000 E RO F8720000 E RO F8740000 E RO F8760000 E RO | |||
F8780000 E RO F87A0000 E RO F87C0000 E RO F87E0000 E RO F8800000 E RO | |||
F8820000 E RO F8840000 E RO F8860000 E RO F8880000 E RO F88A0000 E RO | |||
F88C0000 E RO F88E0000 E RO F8900000 E RO F8920000 E RO F8940000 E RO | |||
F8960000 E RO F8980000 E RO F89A0000 E RO F89C0000 E RO F89E0000 E RO | |||
F8A00000 E RO F8A20000 E RO F8A40000 E RO F8A60000 E RO F8A80000 E RO | |||
F8AA0000 E RO F8AC0000 E RO F8AE0000 E RO F8B00000 E RO F8B20000 E RO | |||
F8B40000 E RO F8B60000 E RO F8B80000 E RO F8BA0000 E RO F8BC0000 E RO | |||
F8BE0000 E RO F8C00000 E RO F8C20000 E RO F8C40000 E RO F8C60000 E RO | |||
F8C80000 E RO F8CA0000 E RO F8CC0000 E RO F8CE0000 E RO F8D00000 E RO | |||
F8D20000 E RO F8D40000 E RO F8D60000 E RO F8D80000 E RO F8DA0000 E RO | |||
F8DC0000 E RO F8DE0000 E RO F8E00000 E RO F8E20000 E RO F8E40000 E RO | |||
F8E60000 E RO F8E80000 E RO F8EA0000 E RO F8EC0000 E RO F8EE0000 E RO | |||
F8F00000 E RO F8F20000 E RO F8F40000 E RO F8F60000 E RO F8F80000 E RO | |||
F8FA0000 E RO F8FC0000 E RO F8FE0000 RO F8FE8000 RO F8FF0000 RO | |||
F8FF8000 E RO | |||
U-Boot> | |||
Note that the 1st two sectors with U-Boot saved in them came up as not being errased ('E') but that all sectors came up Read Only ('''RO'''). | |||
Same with the last four sectors that the U-Boot '''saveenv''' command Errased. | |||
This is likely a bug that we have been investigating and will be discussing with the U-Boot developers sometime in the future prior to pushing our U-boot changes upstream. | |||
Further details on U-Boot in general are in the generic <tt>README</tt> at the top of the U-Boot tree. Details specific to the Xtensa architecture are in <tt>doc/README.xtensa</tt>. Details specific to a board are in <tt>board[/<family>]/<board>/README</tt> (for example <tt>board/avnet/xtav60/README</tt>). | Further details on U-Boot in general are in the generic <tt>README</tt> at the top of the U-Boot tree. Details specific to the Xtensa architecture are in <tt>doc/README.xtensa</tt>. Details specific to a board are in <tt>board[/<family>]/<board>/README</tt> (for example <tt>board/avnet/xtav60/README</tt>). |
Revision as of 00:47, 5 November 2009
U-Boot
U-Boot is another popular boot loader. A preliminary port to the Xtensa architecture is now available. See U-Boot Sources (GIT Summary). Or, to access this tree using git directly, use something like:
$ git clone git://git.linux-xtensa.org/git/u-boot/u-boot-xtensa.git u-boot
(Note: This path is subject to change.)
Before you can build U-Boot you must have built the toolchain for XTensa core. Set your PATH to point to the toolchain built using buildroot. For example:
$ export PATH="<workdir>/buildroot/build_xtensa_<cname>/staging_dir/usr/bin:$PATH"
where <cname> is the name of the Xtensa core variant you wish to build for (e.g., dc232b).
To build U-Boot, use the cloned git tree pulled above, change to the top level of the tree, u-boot', then configure it for your board and Xtensa core variant as follows:
cd u-boot make <cname>_<board>_config
This should only take a few seconds. For example, to build U-boot for the 'xtav60' board and 'dc232b' core, type:
$ cd u-boot $ make dc232b_xtav60_config
or for a 'xtav200' board type
$ make dc232b_xtav200_config
Only boards and core variants currently supported in the tree can be built out of the box. Headers for supported cores can be found in the tree under include/asm-xtensa/variant-<cname>. The core specific headers are described in the doc/README.xtensa file. To support a new core, these headers must be copied from the overlay in the same way as for the linux kernel.
After the configuration step, to actually build U-Boot, simply:
$ make all
This will take a quite a few minutes.
Next, start xt-gdb and load u-boot from the top of the git repository:
$ cd u-boot-xtensa $ xt-gdb -n $ file u-boot $ target remote localhost:20000 0 $ reset $ load $ break panic $ continue
Hopefully u-boot will start and display on the LCD
U-Boot 50.00 Mhz
Often you will be starting with a flash in an unknown state and it's best to unprotect and erase the entire flash. Just type protect off all followed by erase all:
U-Boot> protect off all Un-Protect Flash Bank # 1 ................................................................................................................................... done U-Boot> erase all Erase Flash Bank # 1 .......................................................................................................... Flash erase timeout at address f8d40000 da0 Flash erase error at address f8d40000 ........................ done U-Boot>
The timeout and error messages are likley just warning messages and you board has been errased. You can see that with the flash info command flinfo. Below is an example with a LX200 board, which has a much larger flash than the smaller LX60:
U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes
Sector Start Addresses: F8000000 E F8020000 E F8040000 E F8060000 E F8080000 E F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E F8FA0000 E F8FC0000 E F8FE0000 E F8FE8000 E F8FF0000 E F8FF8000 E U-Boot>
Now set your U-Boot environment variables to point to your DHCP and TFTP server. At Tensilica we use a machine in the RTOS group called rtos-lab2:
U-Boot> setenv serverip 192.168.11.78 rtos-lab2 U-Boot> setenv ipaddr 192.168.11.95 I/P address of host running on the LX60/LX200 U-Boot> setenv bootfile u-boot.bin U-Boot> saveenv Saving Environment to Flash... .... done Un-Protected 4 sectors Erasing Flash... .... done Erased 4 sectors Writing to Flash... done .... done Protected 4 sectors U-Boot>
Next, download 'u-boot.bin' from the tftp server:
tftpboot TFTP from server 192.168.11.78; our IP address is 192.168.11.95 Filename 'u-boot.bin'. Load address: 0xd2000000 Loading: T ######## done Bytes transferred = 107592 (1a448 hex)
on a LX200 we have much more space and can easily fit a version of U-boot that has been compiled without optimization to make debugging much easier, So in this case the image is a bit larger:
U-Boot> tftpboot Using open_ethernet device TFTP from server 192.168.11.78; our IP address is 192.168.11.95 Filename 'u-boot.bin'. Load address: 0xd2000000 Loading: ############### done Bytes transferred = 205852 (3241c hex) U-Boot>
Note that for both the LX200 and the LX60 that the image is a bit less than 2 sectors,
so turn off protection on the 1st two sectors and
erase the current contents. For the LX60 you do this:
U-Boot> protect off F8000000 F801FFFF ... done Un-Protected 2 sectors U-Boot> erase F8000000 F801FFFF erase F8000000 F801FFFF ... done
For the LX200 the starting address is the same as with the LX60 but the last addesss is twice as high:
U-Boot> protect off F8000000 F803FFFF ... done Un-Protected 2 sectors U-Boot> erase F8000000 F803FFFF Erased 2 sectors U-Boot>
Finally we protect these first two sectors so that U-Boot isn't easily errased by accident. Below is what it looks like on a LX200 with a subsequent display of the flash info:
U-Boot> protect on F8000000 F803FFFF .. done Protected 2 sectors U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes
Sector Start Addresses: F8000000 RO F8020000 RO F8040000 E F8060000 E F8080000 E F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E F8FA0000 E F8FC0000 E F8FE0000 RO F8FE8000 RO F8FF0000 RO F8FF8000 RO U-Boot>
Note that the U-Boot saveenv command Erassed and protected the last to sectors of this LX200.
Now copy the the image of u-boot.bin in memory to the flash. For the XL60 you copy 0x20000
bytes from 0xd2000000 to 0XF8000000:
cp.b d2000000 F8000000 20000 Copy to Flash... done
For the LX200 you copy 0x40000 bytes from 0xd2000000 to 0XF8000000:
cp.b d2000000 F8000000 40000 Copy to Flash... done
Now U-boot has been saved at the beginning of the flash and can be easy seen with the flash info command. On the LX200 it should look like this:
U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes
Sector Start Addresses: F8000000 F8020000 F8040000 E F8060000 E F8080000 E F80A0000 E F80C0000 E F80E0000 E F8100000 E F8120000 E F8140000 E F8160000 E F8180000 E F81A0000 E F81C0000 E F81E0000 E F8200000 E F8220000 E F8240000 E F8260000 E F8280000 E F82A0000 E F82C0000 E F82E0000 E F8300000 E F8320000 E F8340000 E F8360000 E F8380000 E F83A0000 E F83C0000 E F83E0000 E F8400000 E F8420000 E F8440000 E F8460000 E F8480000 E F84A0000 E F84C0000 E F84E0000 E F8500000 E F8520000 E F8540000 E F8560000 E F8580000 E F85A0000 E F85C0000 E F85E0000 E F8600000 E F8620000 E F8640000 E F8660000 E F8680000 E F86A0000 E F86C0000 E F86E0000 E F8700000 E F8720000 E F8740000 E F8760000 E F8780000 E F87A0000 E F87C0000 E F87E0000 E F8800000 E F8820000 E F8840000 E F8860000 E F8880000 E F88A0000 E F88C0000 E F88E0000 E F8900000 E F8920000 E F8940000 E F8960000 E F8980000 E F89A0000 E F89C0000 E F89E0000 E F8A00000 E F8A20000 E F8A40000 E F8A60000 E F8A80000 E F8AA0000 E F8AC0000 E F8AE0000 E F8B00000 E F8B20000 E F8B40000 E F8B60000 E F8B80000 E F8BA0000 E F8BC0000 E F8BE0000 E F8C00000 E F8C20000 E F8C40000 E F8C60000 E F8C80000 E F8CA0000 E F8CC0000 E F8CE0000 E F8D00000 E F8D20000 E F8D40000 E F8D60000 E F8D80000 E F8DA0000 E F8DC0000 E F8DE0000 E F8E00000 E F8E20000 E F8E40000 E F8E60000 E F8E80000 E F8EA0000 E F8EC0000 E F8EE0000 E F8F00000 E F8F20000 E F8F40000 E F8F60000 E F8F80000 E F8FA0000 E F8FC0000 E F8FE0000 E F8FE8000 E F8FF0000 RO F8FF8000 RO U-Boot>
On both the LX60 and the LX200 now move DIP switch 8 to the ON position, power cycle the LX60, and you should see U-boot in the LCD display and the serial console should print something like the following on the LX60:
U-Boot 1.3.2 (Aug 27 2009 - 18:23:04) CPU: Xtensa dc232b at 50.00 MHz Board: XT-AV60: Avnet board + Xilinx LX60 FPGA + Tensilica bitstream SysRAM: 64 MB Flash: 4 MB In: serial Out: serial Err: serial MAC: U-Boot>
For the LX200 you should see something like the following.
U-Boot 2009.08-00060-g3aa8b68-dirty (Sep 10 2009 - 01:19:31)
CPU: Xtensa test_mmuhifi_c3 at 41.6777 MHz Board: XT-AV200: Avnet board + Xilinx LX200 FPGA + Tensilica bitstream SysRAM: 96 MB *** Warning - bad CRC, using default environment
Flash: 16 MB In: serial Out: serial Err: serial MAC: U-Boot> Timed out waiting for command
U-Boot> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 16 MB in 131 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes
Sector Start Addresses: F8000000 RO F8020000 RO F8040000 E RO F8060000 E RO F8080000 E RO F80A0000 E RO F80C0000 E RO F80E0000 E RO F8100000 E RO F8120000 E RO F8140000 E RO F8160000 E RO F8180000 E RO F81A0000 E RO F81C0000 E RO F81E0000 E RO F8200000 E RO F8220000 E RO F8240000 E RO F8260000 E RO F8280000 E RO F82A0000 E RO F82C0000 E RO F82E0000 E RO F8300000 E RO F8320000 E RO F8340000 E RO F8360000 E RO F8380000 E RO F83A0000 E RO F83C0000 E RO F83E0000 E RO F8400000 E RO F8420000 E RO F8440000 E RO F8460000 E RO F8480000 E RO F84A0000 E RO F84C0000 E RO F84E0000 E RO F8500000 E RO F8520000 E RO F8540000 E RO F8560000 E RO F8580000 E RO F85A0000 E RO F85C0000 E RO F85E0000 E RO F8600000 E RO F8620000 E RO F8640000 E RO F8660000 E RO F8680000 E RO F86A0000 E RO F86C0000 E RO F86E0000 E RO F8700000 E RO F8720000 E RO F8740000 E RO F8760000 E RO F8780000 E RO F87A0000 E RO F87C0000 E RO F87E0000 E RO F8800000 E RO F8820000 E RO F8840000 E RO F8860000 E RO F8880000 E RO F88A0000 E RO F88C0000 E RO F88E0000 E RO F8900000 E RO F8920000 E RO F8940000 E RO F8960000 E RO F8980000 E RO F89A0000 E RO F89C0000 E RO F89E0000 E RO F8A00000 E RO F8A20000 E RO F8A40000 E RO F8A60000 E RO F8A80000 E RO F8AA0000 E RO F8AC0000 E RO F8AE0000 E RO F8B00000 E RO F8B20000 E RO F8B40000 E RO F8B60000 E RO F8B80000 E RO F8BA0000 E RO F8BC0000 E RO F8BE0000 E RO F8C00000 E RO F8C20000 E RO F8C40000 E RO F8C60000 E RO F8C80000 E RO F8CA0000 E RO F8CC0000 E RO F8CE0000 E RO F8D00000 E RO F8D20000 E RO F8D40000 E RO F8D60000 E RO F8D80000 E RO F8DA0000 E RO F8DC0000 E RO F8DE0000 E RO F8E00000 E RO F8E20000 E RO F8E40000 E RO F8E60000 E RO F8E80000 E RO F8EA0000 E RO F8EC0000 E RO F8EE0000 E RO F8F00000 E RO F8F20000 E RO F8F40000 E RO F8F60000 E RO F8F80000 E RO F8FA0000 E RO F8FC0000 E RO F8FE0000 RO F8FE8000 RO F8FF0000 RO F8FF8000 E RO U-Boot>
Note that the 1st two sectors with U-Boot saved in them came up as not being errased ('E') but that all sectors came up Read Only (RO). Same with the last four sectors that the U-Boot saveenv command Errased. This is likely a bug that we have been investigating and will be discussing with the U-Boot developers sometime in the future prior to pushing our U-boot changes upstream.
Further details on U-Boot in general are in the generic README at the top of the U-Boot tree. Details specific to the Xtensa architecture are in doc/README.xtensa. Details specific to a board are in board[/<family>]/<board>/README (for example board/avnet/xtav60/README).