Supported Processors: Difference between revisions

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(New page: == Xtensa Processor Architecture == right The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core. SoC and process...)
 
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[[image:chip.jpg|right]]
[[image:chip.jpg|right]]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core. SoC and processor designers can select from a variety of options, such as instruction-set extensions, memory, cache, and interrupt configurations. Moreover, Xtensa's extensibility also allows to create custom-defined instructions, registers, ports, and queues. In any case, the underlying base Xtensa instruction set is not compromised, thereby ensuring compatibility of third party application software and development tools.
The Xtensa processor architecture is a configurable and extensible synthesizable 32-bit RISC processor core. SoC and processor designers can select from a variety of options, such as instruction-set extensions (for example, narrow instructions, floating point instructions, etc.), memory, cache, and interrupt configurations. Moreover, Xtensa processors also support custom-defined instructions and registers. Nevertheless, all Xtensa processors share a common base instruction set architecture, thereby ensuring compatibility of third party application software and development tools.


Tensilica’s Diamond Standard Series processor family consists of a number of ready-to-use synthesizable cores and is based on the Xtensa processor architecture. The Diamond 232L processor contains an MMU and was designed to run Linux.
Tensilica’s Diamond Standard Series processor family consists of a number of ready-to-use synthesizable cores and is based on the Xtensa processor architecture. The Diamond Standard 233L processor, for example, contains an MMU and fully supports running Linux.  


== Processor Configurations ==
== Automatic Support for Custom Xtensa Cores ==


Xtensa processors can come in a variety of configurations as defined by processor vendors. Although the strength of the Xtensa architecture is certainly the ability to optimize a processor for a particular application, many generic applications usually don't benefit much from these extensions. User-defined instructions optimized for audio decoding, for example, will probably not improve the performance of a web server much. Developers can, therefore, choose to use development tools configured for a generic processor configuration that provides binary-compatibility across various Xtensa processors to compile generic applications. ''LinuxBE'' (big-endian) and ''LinuxLE'' (little-endian) are such configurations. Based on the ''linux'' template provided to processor designers, they define a subset of options required to run Linux. Applications compiled with development tools for this configuration should, therefore, work on all Xtensa processors running Linux.  
Despite the endless possibilities provided by the configurability and extensibility of the Xtensa architecture, generating an open source toolchain and kernel that fully support a specific configured Xtensa processor is straightforward. It only requires to update a small set of files inside the toolchain and kernel sources before the actual build process. All necessary files are typically provided by the processor vendor or directly from Tensilica in the form of a single ''overlay'' file. This mostly automated process (scripted) avoids having to ''manually'' port the kernel to a new processor variant, which would be typical for a fixed processor architecture.  


== Development Toolchain ==
Note that a ''processor configuration'' is also often referred to as a ''core variant'' in Linux.  The following list shows processor configurations already included in the kernel:


Although the Xtensa architecture provides seemingly unlimited combinations of processor configurations, modifications to create optimized development tools and kernels are limited to a small set of configuration files in the respective sources. Once the configuration files have been copied into the sources, the development tools can be configured and built as usual.
* Diamond 232L
 
* Diamond 233L
== Kernel Configuration ==
* Stretch S6000 (without MMU)
 
* 'FSF' default configuration (only for tool verification)
Because the kernel is much closer to the hardware and provides an abstraction for many architectural options, it needs to be configured and compiled for a particular platform and processor configuration. If user-defined instruction are used, it also requires development tools configured for the particular processor. The following list shows processors currently supported by the kernel.
 
 
{| border=1 cellspacing=0 cellpadding=3
|+ Supported processors in the Linux kernel
|- style="background:#f8f8f8;"
! Name !! Byte order !! Base configuration !! Notes
|-
| 'FSF' || big endian || LinuxEB || Only for verification.
|-
| Diamond 232L || little/big endian ||LinuxEB or LinuxEL ||
|-
| Stretch S5000 || little endian || LinuxEL ||
|-
| Custom || vendor specific || vendor specific || vendor specific
|}
 
 
All configuration files are located inside the Xtensa include directory in the kernel sources (<code>include/asm-xtensa/variant-''config''</code>). The ''custom'' entry in the table is a placeholder for custom-defined configurations provided by processor vendors. Developers should copy the configuration files into the custom variant directory (<code>include/asm-xtensa/variant-custom</code>) and select the ''custom'' processor during kernel configuration.

Latest revision as of 20:50, 11 November 2013

Xtensa Processor Architecture

Chip.jpg

The Xtensa processor architecture is a configurable and extensible synthesizable 32-bit RISC processor core. SoC and processor designers can select from a variety of options, such as instruction-set extensions (for example, narrow instructions, floating point instructions, etc.), memory, cache, and interrupt configurations. Moreover, Xtensa processors also support custom-defined instructions and registers. Nevertheless, all Xtensa processors share a common base instruction set architecture, thereby ensuring compatibility of third party application software and development tools.

Tensilica’s Diamond Standard Series processor family consists of a number of ready-to-use synthesizable cores and is based on the Xtensa processor architecture. The Diamond Standard 233L processor, for example, contains an MMU and fully supports running Linux.

Automatic Support for Custom Xtensa Cores

Despite the endless possibilities provided by the configurability and extensibility of the Xtensa architecture, generating an open source toolchain and kernel that fully support a specific configured Xtensa processor is straightforward. It only requires to update a small set of files inside the toolchain and kernel sources before the actual build process. All necessary files are typically provided by the processor vendor or directly from Tensilica in the form of a single overlay file. This mostly automated process (scripted) avoids having to manually port the kernel to a new processor variant, which would be typical for a fixed processor architecture.

Note that a processor configuration is also often referred to as a core variant in Linux. The following list shows processor configurations already included in the kernel:

  • Diamond 232L
  • Diamond 233L
  • Stretch S6000 (without MMU)
  • 'FSF' default configuration (only for tool verification)
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