System Hardware

From Linux/Xtensa

[edit] System Hardware Development

This page contains recommendations, notes, limitations and requirements for the development of hardware systems using Linux-Xtensa.

Recommendations

For future compatibility with Linux-Xtensa releases please include support for the atomic load-conditional-store S32C1I instruction when designing your memory system. The memory system must provide for the atomic update of a memory location by holding off the load until all other transactions are complete and holding off any other transactions once the atomic operation has started until it has finished.

Tensilica's PIF Bridges all support this but if you are using other bridges this implementation should be verified.